Accession Number : AD0607229

Title :   ON THE MINIMUM STAGE REALIZATION OF SWITCHING FUNCTIONS USING LOGIC GATES WITH LIMITED FAN-IN.

Descriptive Note : Technical rept.,

Corporate Author : PRINCETON UNIV N J DIGITAL SYSTEMS LAB

Personal Author(s) : Hicks,G. L. ; Bernstein,A. J.

Report Date : AUG 1964

Pagination or Media Count : 12

Abstract : In this paper a method was presented for reducing the number of stages of logic in the realization of an arbitrary Boolean function when an upper bound exists on the fan-in at each gate. A procedure for obtaining the minimum stage realization of the function in sum of products form was first developed. The use of factoring to reduce the number of stages below this minimum was then described. (Author)

Descriptors :   (*SWITCHING CIRCUITS, GATES (CIRCUITS)), (*GATES (CIRCUITS), SWITCHING CIRCUITS), (*COMPUTER LOGIC, SPECIAL FUNCTIONS (MATHEMATICAL)), MATHEMATICAL LOGIC, OPTIMIZATION, TIME LAG THEORY, CIRCUITS

Distribution Statement : APPROVED FOR PUBLIC RELEASE