Accession Number : AD0670094

Title :   INTEGRATOR FOR A SERIAL DIGITAL DIFFERENTIAL ANALYZER (BLOK INTEGRIROVANIYA TSIFROVOGO DIFFERENTSIALNOGO ANALIZATORA POSLEDOVATELNOGO TIPA),

Corporate Author : FOREIGN TECHNOLOGY DIV WRIGHT-PATTERSON AFB OHIO

Personal Author(s) : Askerov,Ch. I. ; Kovachich,Yu. V. ; Semenkov,O. I.

Report Date : 21 JUL 1967

Pagination or Media Count : 8

Abstract : An author certificate has been issued for an integrator unit for a serial acting digital differential analyzer. The unit consists of a delay line for increment storage, an increment counter, a shift register, adders, gates, an inhibit circuit, and an operation command block. The delay line output is connected to one input of gate whose other input is tied with the operation command block output. The output of this gate is applied to the shift register. The outputs from the shift register stages are applied to the corresponding increment counter stages through gates which are also connected to a control unit. The outputs of the increment counter stages are grouped and applied to an inhibit gate whose second input comes from the control unit. The inhibitor output is actually the input to the delay line gate, whose other input is connected to the output of a storage register for null function values. (Author)

Descriptors :   (*ANALOG COMPUTERS, INTEGRATORS), DIGITAL SYSTEMS, DATA STORAGE SYSTEMS, GATES(CIRCUITS), DELAY CIRCUITS, SHIFT REGISTERS, COUNTING METHODS, CONTROL SYSTEMS, INHIBITION, USSR

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE