Accession Number : AD0685152

Title :   EXPERIMENT IN DEVELOPING THE COMPUTING COMPLEX OF A SMALL TRANSISTORIZED DIGITAL COMPUTER,

Corporate Author : FOREIGN TECHNOLOGY DIV WRIGHT-PATTERSON AFB OHIO

Personal Author(s) : Zubov,V. S.

Report Date : 20 SEP 1968

Pagination or Media Count : 20

Abstract : A series of computer circuits and a general-purpose computer arithmetic unit (AU) using those circuits, which were designed at the Moscow Power Engineering Institute, are described. The following circuits were designed: flip-flop, an element realizing gating-fan-in-shaping a decoder element performing a logical function z = x1 xy1 xy2 xy3 xy4 xy5, a pulse-stretcher, an inverter, and a passive delay line. All circuits are based on P-16 transistors, which use a -12-volt and +2.5-volt bias supply. The circuits are designed to operate at 400kHg clock frequency in a -20 - +60C temperature range. The authors also describes a 40-bit parallel arithmetic unit operating on numbers in the floating point mode. The AU based on these circuits features a structure the implementation of which resulted in improved computing speed, reliability, and economy. The machine performs 80,000 additions/sec, 25,000 multiplications/sec, or 10,000 divisions/sec, and uses only 40 transistors and 120 diodes for each bit processed by the AU. (Author)

Descriptors :   (*DIGITAL COMPUTERS, *COMPUTER LOGIC), RELAXATION OSCILLATORS, TRANSISTORS, USSR

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE