Accession Number : AD0697189

Title :   DIFFERENTIAL MODE ANALYSIS AND SYNTHESIS OF SEQUENTIAL SWITCHING NETWORKS.

Descriptive Note : Technical rept.,

Corporate Author : TEXAS UNIV AUSTIN ELECTRONICS RESEARCH CENTER

Personal Author(s) : Smith,John R. , Jr. ; Roth,Charles H. , Jr

Report Date : 28 MAR 1969

Pagination or Media Count : 115

Abstract : Standard methods for classification, analysis, and synthesis of sequential switching networks are inadequate for many networks which have edge-sensitive flip-flops as memory. A differential mode (DM) sequential machine is introduced as a model for such networks. Any network which can be modeled by a fundamental mode a synchronous (FMA) sequential machine can also be modeled by a DM machine, but the DM machine often requires fewer internal states. A DM machine can always be converted to a FMA machine, but usually the FMA model requires additional internal states. A general model for edge-sensitive flip-flops is defined from which an inhibited-toggle (I-T) flip-flop is derived. The I-T flip-flop, a general-purpose edge-sensitive flip-flop, has properties which result in logic savings for some network realizations. Edge-sensitive flip-flops are represented by two methods: (1) FMA flow table models are developed for the I-T and other well-known types of flip-flops. These models show that edge-sensitive flip-flops generally have hidden internal states. (2) The terminal behavior of the flip-flops is described by means of difference operators. Several methods of analysis for DM networks are given. A general method for synthesis of sequential switching networks using I-T flip-flops is presented. The network is first represented by a DM table and flip-flop input equations are derived from this table. (Author)

Descriptors :   (*COMPUTER LOGIC, *SWITCHING CIRCUITS), LOGIC CIRCUITS, RELAXATION OSCILLATORS, SYNTHESIS, CLASSIFICATION

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE