Accession Number : AD0747383

Title :   Comment on Simple Synthesis Method for Sequential Logical Circuits,

Corporate Author : FOREIGN TECHNOLOGY DIV WRIGHT-PATTERSON AFB OH

Personal Author(s) : Servit, Michal

Report Date : 12 JUN 1972

Pagination or Media Count : 11

Abstract : The article is a supplement to the article of B. Burdyar (see arstr. C5629 of 1971). Some misprints of this article are corrected. Further possibilities of the minimization of logic functions are presented. Some fault phenomena occurring in asynchronous circuits are analysed. (Author)

Descriptors :   *LOGIC CIRCUITS, COMPUTER LOGIC, ERRORS, CORRECTIONS, CZECHOSLOVAKIA.

Subject Categories : Electrical and Electronic Equipment
      Cybernetics

Distribution Statement : APPROVED FOR PUBLIC RELEASE