Accession Number : AD0749604

Title :   Application of the Method of Boundary Investigations to the Design of Integrated Transistor-Transistor Logic Circuits,

Corporate Author : FOREIGN TECHNOLOGY DIV WRIGHT-PATTERSON AFB OHIO

Personal Author(s) : Kazennov,G. G. ; Smolko,G. G. ; Strukov,V. N. ; Maksimov,Yu. O.

Report Date : 26 MAY 1972

Pagination or Media Count : 24

Abstract : The obtained analytic expressions which connect the circuit characteristics with the component parameters make it possible to analyze a TTL integrated circuit and to calculate it by the method of boundary testing. The use of this method makes it possible to find the optimal resistor values ensuring a minimum signal propagation delay, and simultaneously guaranteeing circuit efficiency with a combination of the worst operating conditions and spread of the component parameters. The method of boundary testing may be used in circuit design with consideration of aging or margin of safety. The prospects in using this method to calculate semiconductor integrated circuits must be especially stressed, since parameter optimization is directly related to the percentage output of useful circuits. (Author)

Descriptors :   (*LOGIC CIRCUITS, TEST METHODS), (*INTEGRATED CIRCUITS, TEST METHODS), TRANSISTORS, MATHEMATICAL MODELS, ELECTRICAL PROPERTIES, USSR

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE