Accession Number : AD0754680

Title :   Realization of Combination Adders for a Simultaneous Addition of Several Terms,

Corporate Author : FOREIGN TECHNOLOGY DIV WRIGHT-PATTERSON AFB OHIO

Personal Author(s) : Belyavskii,V. L. ; Kakurin,N. Ya. ; Vasilenko,Yu. A.

Report Date : 19 JAN 1973

Pagination or Media Count : 19

Abstract : The report discusses combination sum circuits that operate in a computer system different from a binary system. The enumerated types of sum circuits have certain disadvantages over ordinary n bit parallel sum circuits in the time of executing tracking operations.

Descriptors :   (*LOGIC CIRCUITS, COMPUTER LOGIC), DIGITAL COMPUTERS, TRANSFER FUNCTIONS, USSR

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE