Accession Number : AD0783874

Title :   Macromodular Computer Design. Part 1. Development of Macromodules. Volume IV. The Synchronizer 'Glitch' Problem.

Descriptive Note : Final rept. 1 Apr 65-1 Dec 73,

Corporate Author : WASHINGTON UNIV ST LOUIS MO COMPUTER SYSTEMS LAB

Personal Author(s) : Chaney,Thomas J.

Report Date : FEB 1974

Pagination or Media Count : 60

Abstract : There is a fundamental problem in synchronizing communication between any two concurrently operating digital systems that lack a common time reference. This problem involves the inability to build a completely reliable synchronizer or arbiter that will work in a prescribed amount of time. Stimulated by the need for an interlock macromodule design of predictable reliability, the inability to find evidence of previous studies, and indications that this problem has been responsible for significant reduction in the reliability of several commercial machines, the author undertook theoretical and experimental studies of this problem. The results to date of these studies are documented in the volume. (Author)

Descriptors :   *Central processing units, *Modules(Electronics), *Logic devices, Synchronization(Electronics), Reliability(Electronics), Switching circuits

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE