Accession Number : AD0810388

Title :   FAILURE MECHANISMS IN MOS TRANSISTORS.

Descriptive Note : Quarterly rept. no. 2, 29 Jun-30 Sep 66,

Corporate Author : MOTOROLA INC PHOENIX AZ SEMICONDUCTOR GROUP

Personal Author(s) : Clark, Lowell ; Forehand, Harry

Report Date : FEB 1967

Pagination or Media Count : 38

Abstract : The main objectives of the study are to determine the basic failure mechanisms characteristic of silicon insulated gate field effect transistors (IGFET), identify the sources of failure, and develop techniques for reliability screening and stress testing of the finished devices. The device type selected for unit Group 1 study is a silicon p-channel-enhancement IGFET. Temperature storage has revealed no sensitive characteristics of the device at the 240-hour point. Step stress testing is exhibiting the failure mechanisms previously seen in the gate bias testing (I(DSS) and V(th) changes).

Descriptors :   (*FIELD EFFECT TRANSISTORS, FAILURE(ELECTRONICS)), VOLTAGE, ANNEALING, METALS, OXIDES, DEFECTS(MATERIALS), DETECTION.

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE