Accession Number : AD0826377

Title :   SPEED BUFFERING AND DIGITAL COMBINING TECHNIQUES.

Descriptive Note : Final rept.,

Corporate Author : COMMUNICATION SYSTEMS INC FALLS CHURCH VA

Personal Author(s) : Peugh, D. E. ; Cecka, R. A.

Report Date : FEB 1968

Pagination or Media Count : 186

Abstract : The report contains comparative analysis of bit stuffing techniques, logic design of a 9.37 Mbs system, complete design and implementation of a 2.418 Mbs system, simulated data sources, error correlators and recommendations for an order wire. It also discusses ways of improving the design of the voltage controlled oscillator so that jitter produced can be tolerated by digital repeaters. (Author)

Descriptors :   (*INPUT OUTPUT DEVICES, SYNCHRONIZATION(ELECTRONICS)), COMPUTER LOGIC, LOGIC CIRCUITS, MULTIPLEXING, OSCILLATORS, ELECTRIC FILTERS, FEASIBILITY STUDIES, PERFORMANCE(ENGINEERING), MEMORY DEVICES, RELAXATION OSCILLATORS, CODING.

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE