Accession Number : AD0836051

Title :   EFFICIENT TESTING OF COMBINATIONAL LOGIC CELLS IN LARGE-SCALE ARRAYS.

Descriptive Note : Technical rept.,

Corporate Author : STANFORD UNIV CA STANFORD ELECTRONICS LABS

Personal Author(s) : Tammaru, Enn

Report Date : MAY 1968

Pagination or Media Count : 131

Abstract : The research investigates the characteristics that regular cellular arrays must have in order that each cell can be tested from the peripheral terminals of the array. The nominally identical cells in the array have n inputs and n outputs, where each of the n outputs is some combinational function of the n input variables of the cell. Of special interest is the characterization of cells and arrays in order to predict whether defective cells can be not only tested but also located within the array. (Author)

Descriptors :   *INTEGRATED CIRCUITS, *LOGIC CIRCUITS, TEST METHODS, GATES(CIRCUITS), SWITCHING CIRCUITS, CIRCUIT INTERCONNECTIONS, ELECTRIC TERMINALS, RELIABILITY(ELECTRONICS), PERFORMANCE(ENGINEERING), COMPUTER LOGIC, MANUFACTURING, THESES.

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE