Accession Number : AD0914163
Title : Low Power D/A Converter. Part I.
Descriptive Note : Final rept. Feb 71-Mar 72,
Corporate Author : SINGER CO LITTLE FALLS NJ KEARFOTT DIV
Personal Author(s) : Vojvodich, M.
Report Date : SEP 1973
Pagination or Media Count : 65
Abstract : The object of this phase of the development was to develop a compatible set of C/MOS components (comparators, amplifiers, switches) whose characteristics would meet the requirements of the overall converter requirements. The C/MOS amplifier/comparator was designed and incorporated on a D/A breadboard. The amplifier fell short in its design goals of bandwidth and slew rate. With the amplifiers configured, the D/A Converter bit rate was reduced more than an order of magnitude. The switch design utilized an additional inverter to voltage-compensate the on resistance of the switch and tended to stabilize the switch on resistance as a function of voltage. Because of the unsuccessful attempt to increase amplifier/comparator bandwidth, the D/A breadboard configured was operated with a 0.5 mHz clock instead of the design goal of 16 mHz, This increased the total conversion time from 10 microsec to 300 microsec. Under these conditions, however, the converter did meet the 0.1 percent accuracy specification design goal. It is anticipated that a second iteraction of the amplifier design will change the drain and source geometries to reduce substrate capacitance to the point where a higher speed amplifier, and hence converter, will be realized. (Author)
Descriptors : (*DIGITAL TO ANALOG CONVERTERS, POWER), ELECTRONIC SWITCHES, INTEGRATED CIRCUITS, COMPARATORS, GATES(CIRCUITS), AMPLIFIERS, SUBSTRATES, POWER SUPPLIES, LOGIC CIRCUITS, SPECIFICATIONS, GAIN.
Subject Categories : Electrical and Electronic Equipment
Distribution Statement : APPROVED FOR PUBLIC RELEASE