Accession Number : ADA019851
Title : Automated Design of Digital Integrate Circuit Masks.
Descriptive Note : Master's thesis,
Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OHIO SCHOOL OF ENGINEERING
Personal Author(s) : Glastetter,Russell A.
Report Date : DEC 1975
Pagination or Media Count : 155
Abstract : A computer program is developed to generate an integrated circuit mask for the metalization layer of a standard COS/MOS chip. The program is written in FORTRAN Extended for the CDC 6600 computer. It is designed for digital circuits and bridges the gap from logic diagram level information to actual mask production tapes. The program was designed for use with the RCA Gate Universal Array family of chips. These chips consist of a large array of COS/MOS transistors. Circuits are built up from such digital logic functions as gates, flip-flops, binary dividers and other small scale logic functions. The interconnecting paths between the modules are routed by a form of the Lee algorithm. The output is via standard plotting system subroutines and, with very slight modification, can be used with most plotting systems.
Descriptors : *Integrated circuits, *Masks, *Computer aided design, Chips(Electronics), Metallizing, Algorithms, Computer programs, FORTRAN, Theses
Subject Categories : Electrical and Electronic Equipment
Computer Programming and Software
Mfg & Industrial Eng & Control of Product Sys
Distribution Statement : APPROVED FOR PUBLIC RELEASE