Accession Number : ADA112812

Title :   Bit Synchronization with Cross Spectrum Synchronization Loop. Attachment III.


Personal Author(s) : Maag,R A ; Lindsey,W C ; Chie,C M ; Tsang,C S

PDF Url : ADA112812

Report Date : Oct 1981

Pagination or Media Count : 50

Abstract : This study seeks to identify the optimal analog technique for implementing a bit synchronizer for wideband data channels; and to compare, in detail, the performance of the analog bit synchronizer with the optimal digital implementation exemplified by the Digital Data Transition Tracking Loop (DTTL) already built and tested. For biphase data, it is shown that the optimal analog implementation based upon the cross-spectrum principle is a delay-and-multiply circuit followed by a conventional CW loop. The optimal delay is about one-quarter of the bit duration. For a 12.5 Mbps data stream, it is roughly 20 ns. The IF filter in front of the delay-and-multiply nonlinearity is immaterial as long as the BT product exceeds three approximately. When compared to the DTTL, the performance of the analog loop is roughly equivalent to a DTTL with a 50% error arm window. It outperforms a full-window DTTL by roughly 3 dB in terms of jitter yet gives inferior acquisition performance. On the other hand, a DTTL with a quarter-window outperforms the analog loop by roughly the same amount. It therefore appears that both the analog and digital bit synchronizer performs equally well. The selection of one over the other must be based on other criteria such as sensitivity to environmental variations, biases, stability and perhaps packaging ease.

Descriptors :   *Data processing, *Data transmission systems, *Digital computers, *Synchronism, *Channels, Broadband, Performance(Engineering), Continuous waves, Loops, Analog systems, Data acquisition, Cross sections, Optimization

Subject Categories : Electrical and Electronic Equipment
      Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE