Accession Number : ADA114706

Title :   Processor Displacement: An Area-Time Trade-off Method for VLSI Design.

Descriptive Note : Interim technical rept.,

Corporate Author : PURDUE UNIV LAFAYETTE IN DEPT OF COMPUTER SCIENCES

Personal Author(s) : DeRuyck,David M ; Snyder,Lawrence ; Unruh,John D

PDF Url : ADA114706

Report Date : Mar 1982

Pagination or Media Count : 22

Abstract : Direct VLSI implementation of pipelined (systolic) processor arrays can lead to an over parallelized design causing the chip to have unused or underutilized area. Processor displacement design is a methodology that provides a spectrum of designs with differing time-area trade offs. The methodology is motivated, presented in detail, and illustrated by several examples. Direct experience for the Transitive Closure and Dynamic Programming systolic arrays is presented. (Author)

Descriptors :   *Integrated circuits, Processing equipment, Experimental design, Arrays, Trade off analysis, Displacement, Computations, Estimates, Computer architecture, Computers, Methodology, Chips(Electronics), Dynamic programming, Area coverage

Subject Categories : Electrical and Electronic Equipment
      Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE