Accession Number : ADA138109

Title :   Efficient Computer Architectures for Computing Discrete Fourier Transforms.

Descriptive Note : Master's thesis,

Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING

Personal Author(s) : Route,G. P.

Report Date : DEC 1981

Pagination or Media Count : 336

Abstract : The effects of the IBM 370-155, CDC Cyber 750, Cray-1, and PDP 11/60 architectures on executing selected Discrete Fourier Transform (DFT) algorithms are investigated. The selected DFT algorithms are the radic-2 FFT, mixed-radix FFT, Winograd Fourier Transform Algorithm (WFTA), and Prime Factor Algorithm (PFA). The overall execution times on each computer system is determined. For the IBM 370/155 and CDC Cyber 750, the number and type of instructions and the execution time required for each portion of the FFT programs is determined. This study shows that the number of floating-point additions and multiplications required by the FFT programs determine these programs' execution times on the IBM 370/155. This study also investigated the relationship between the number of a processor's general-purpose registers and the number of data transfers required by an FFT program. Results from the IBM 370/155 and Cyber 750 systems showed that the computer system with fewer registers required more data transfers.

Descriptors :   *Computer architecture, *Discrete Fourier transforms, *Algorithms, *Computations, *Data processing, Comparison, Efficiency, Floating point operation, Instructions, Fast Fourier transforms, Registers(Circuits), Computer programs, Theses

Subject Categories : Theoretical Mathematics
      Computer Programming and Software
      Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE