Accession Number : ADA141868

Title :   Design Study of Floating Point Systolic VLSI Chip.

Descriptive Note : Final rept.,


Personal Author(s) : Nash,J G ; Nudd,G R

PDF Url : ADA141868

Report Date : Mar 1984

Pagination or Media Count : 117

Abstract : The objective of this program was to investigate the feasibility of building a floating point processor (24-bit mantissa and 8-bit exponent) on a single ship based on the Hughes Research Laboratories (HRL) present 28-bit fixed point chip (Multiplication Oriented Processor or MOP chip). The plan was to generate any necessary cell logic, layout, or simulations in order to estimate the size of the chip and predict its performance. Since division and square root were not included in the HRL MOP chip, arithmetic algorithms for performing these operations were to be studied. (Author)

Descriptors :   *Chips(Electronics), *Processing equipment, *Microelectronics, *Algorithms, Arrays, Square roots, Arithmetic, Scalers, Logic, Research facilities, Clocks, Cells

Subject Categories : Electrical and Electronic Equipment
      Theoretical Mathematics

Distribution Statement : APPROVED FOR PUBLIC RELEASE