Accession Number : ADA183572
Title : An Experiment on Intermittent-Failure Mechanisms.
Descriptive Note : Technical rept.,
Corporate Author : STANFORD UNIV CA CENTER FOR RELIABLE COMPUTING
Personal Author(s) : Cortes, Mario L ; McCluskey, Edward J
PDF Url : ADA183572
Report Date : Mar 1987
Pagination or Media Count : 43
Abstract : Intermittent failures are studied by stressing (temperature, supply voltage and extra loading) good parts. The behavior of the chips under stress is similar to that of a marginal chip under normal operating conditions. The experiments show that most intermittent failures are pattern-sensitive for both sequential and combinational circuits. The stuck-at fault model is shown to be inappropriate to describe intermittent failures. This paper presents a case where a single intermittent failure is not detected by a test set with 100% single stuck-at fault coverage. A stress-strength analysis is presented to explain the experimental results. Keywords: Intermittent failures, Pattern sensitive faults, Soft failures, Integrated circuit reliability, Intermittent fault model.
Descriptors : *CHIPS(ELECTRONICS), *FAULTS, *FAILURE, *INTEGRATED CIRCUITS, BEHAVIOR, MODELS, RELIABILITY, PATTERNS, SENSITIVITY, TEST SETS
Subject Categories : Computer Systems
Electrical and Electronic Equipment
Distribution Statement : APPROVED FOR PUBLIC RELEASE