Accession Number : ADA185105

Title :   Expanded VLSI Architectures.

Descriptive Note : Technical rept.,

Corporate Author : PENNSYLVANIA STATE UNIV UNIVERSITY PARK DEPT OF COMPUTER SCIENCE

Personal Author(s) : Owens, Robert M ; Irwin, Mary J

PDF Url : ADA185105

Report Date : Sep 1984

Pagination or Media Count : 21

Abstract : This paper describes a non von Neumann architecture which also conforms to the requirements for VLSI implementation - expanded VLSI architectures. In expanded VLSI machines, more than O(n) processors are used to solve O(n) problems, where inexpensive (in terms of silicon area), fast processors have been added to simplify the processor interconnections. Expanded architectures are constructed by deriving algorithms which trade many of one type of operation, like addition, for regularity of data movement. An expanded architecture for the Discrete Fourier Transform problem is derived. Three operational components are described, each of which can be implemented in one (or a few) VLSI chips. Optimal measures for silicon area and processing time are primary concerns. (Author)

Descriptors :   *COMPUTER ARCHITECTURE, *INTEGRATED CIRCUITS, *PROCESSING EQUIPMENT, DISCRETE FOURIER TRANSFORMS, SILICON, AREA COVERAGE

Subject Categories : Computer Hardware
      Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE