Accession Number : ADA188823
Title : A Digital Logic Simulator with Concurrent Programming Considerations.
Descriptive Note : Master's thesis,
Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING
Personal Author(s) : DeLoria, Wayne C
PDF Url : ADA188823
Report Date : Dec 1987
Pagination or Media Count : 207
Abstract : The digital logic simulator, LOGSIM248, a re-engineered version of LOGSIM, version 5.5, has been implemented as a component of the digital design environment, IDIET (Integrated Digital Engineering Tool). This new design expands the capabilities of the older version by improving run time performance, maintainability, and compatability. Written in the C programming language, LOGSIM248 boasts looser coupling between functional modules while exhibiting greater functional cohesion within these modules. As an integral part of IDIET, the simulator overcomes difficulties created by the complicated user interface of earlier versions. With greater run time performance as a goal, this new simulator was studied and adapted to produce a concurrent implementation. Here, several roadblocks were encountered which essentially showed this algorithm and data structure implementation to be difficult to parallelize at best.
Descriptors : *ALGORITHMS, *DIGITAL SIMULATION, *DIGITAL SYSTEMS, *INTEGRATED SYSTEMS, *LOGIC DEVICES, COHESION, DATA BASES, INTERFACES, MAINTAINABILITY, SIMULATORS, TIME, USER NEEDS, THESES
Subject Categories : Numerical Mathematics
Distribution Statement : APPROVED FOR PUBLIC RELEASE