Accession Number : ADA189630
Title : Calculating Depletion Region Carrier Concentrations with Capacitance-Voltage Measurements and Etching.
Descriptive Note : Master's thesis,
Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING
Personal Author(s) : Gainer, Gordon H , Jr
PDF Url : ADA189630
Report Date : Dec 1987
Pagination or Media Count : 90
Abstract : Methods were developed for finding the charge carrier concentrations within the initial depletion region of n-type semiconductors. These methods combine the capacitance-voltage (C-V) technique with the etching of layers from the semiconductor surface. After each etch, the depletion region is made to end at the same location within the semiconductor. This location is used as a common reference and is arbitrarily chosen at a distance deep below the original unetched surface. For each etch depth, the voltage which extends the depletion region to the common reference distance is found. The voltage drop from an etch depth to the deeper common reference distance is the same as it would be if the semiconductor was not etched. This voltage drop is the sum of the applied voltage and the built-in potential. The built-in potential depends on the barrier potential at the semiconductor surface and the concentration at the common reference distance.
Descriptors : *BARRIERS, *CHARGE CARRIERS, *DEPLETION, *ETCHING, *LAYERS, *N TYPE SEMICONDUCTORS, *SEMICONDUCTORS, CAPACITANCE, DEPTH, MEASUREMENT, RANGE(DISTANCE), SELF CONTAINED, SURFACES, VOLTAGE, THESES
Subject Categories : Solid State Physics
Distribution Statement : APPROVED FOR PUBLIC RELEASE