Accession Number : ADA190910

Title :   Design and Evaluation of Fault-Tolerant VLSI/WSI Processor Arrays.

Descriptive Note : Final technical rept. 1 Jul 85-31 Dec 87,

Corporate Author : PURDUE UNIV LAFAYETTE IN

Personal Author(s) : Fortes, Jose A

PDF Url : ADA190910

Report Date : 31 Dec 1987

Pagination or Media Count : 233

Abstract : This document is the final report of work performed under the project entitled 'Design and Evaluation of Fault-Tolerant VLSI/WSI Processor Arrays' supported by the Innovative Science and Technology Office of the Strategic Defense Initiative Organization and administered through the Office of Naval Research under Contract No. 00014-85-k-0588. With the concurrence of Dr. Clifford Lau, the Scientific Officer for this project, this final report consists of reprints of publications reporting work performed under the project. In the attached list of publications, items 1, 2, 3 and 7 are papers where fault-tolerant systems for processor arrays are proposed and studied. Studies on algorithmic and software aspects relevant to systems are reported in items 4, 5, 6, 12 and 13. Research on hardware and reconfigurability issues for fault-tolerant processor arrays is reported in items 8, 9, 10 and 11.

Descriptors :   *ANTIMISSILE DEFENSE SYSTEMS, *ARRAYS, *COMPUTER PROGRAMS, *FAULT TOLERANT COMPUTING, *PROCESSING EQUIPMENT, FAULTS, OFFICER PERSONNEL, REPRINTS, SCIENTISTS, STRATEGIC WARFARE, TOLERANCE

Subject Categories : Computer Hardware
      Computer Programming and Software
      Antimissile Defense Systems

Distribution Statement : APPROVED FOR PUBLIC RELEASE