Accession Number : ADA194566

Title :   Concurrent Computer Architecture,

Corporate Author : MASSACHUSETTS INST OF TECH CAMBRIDGE ARTIFICIAL INTELLIGENCE LAB

Personal Author(s) : Dally, William J

PDF Url : ADA194566

Report Date : Nov 1987

Pagination or Media Count : 30

Abstract : Present generation concurrent computers offer performance greater than vector supercomputers and are easily programmed by non-experts. Evolution of VLSI technology and a better understanding of concurrent machine organization have led to substantial improvements in the performance of numerical processors, symbolic processors, and communication networks. A 100MFLOPS arithmetic chip and a 5 us latency communication network are under construction. Low-latency communication and task switching simplify concurrent programming by removing considerations of grain size and locality. A message-passing concurrent computer with a global virtual address space provides programmers with both a shared memory, and message-based communication and synchronization. This paper describes recent advances in concurrent computer architecture drawing on examples from the J-Machine, and experimental concurrent computer under development at MIT.

Descriptors :   *COMMUNICATIONS NETWORKS, *COMPUTER ARCHITECTURE, *SWITCHING, GRAIN SIZE, MEMORY DEVICES, PROGRAMMERS, SUPERCOMPUTERS, TIME SHARING, VECTOR ANALYSIS

Subject Categories : Computer Hardware
      Command, Control and Communications Systems

Distribution Statement : APPROVED FOR PUBLIC RELEASE