Accession Number : ADA273734
Title : A VHDL Register Transfer Level Model of the Linear Token Passing Multiplex Data Bus Protocol for the High Speed Data Bus.
Descriptive Note : Interim rept. 1 Jun 92-15 Jul 93,
Corporate Author : WRIGHT LAB WRIGHT-PATTERSON AFB OH
Personal Author(s) : Myers, Jerry A.
Report Date : SEP 1993
Pagination or Media Count : 74
Abstract : The research project abstract presented will describe the design process to develop A partial simulatable specification model written in VHDL at the register transfer level to describe the linear token passing multiplex data bus protocol ('PROTOCOL') specification. The PROTOCOL is a distributed token passing computer protocol which operates over a dual redundant bus. The PROTOCOL is used as the communications standard to implement the high speed data bus (HSDB) module specification. The PROTOCOL and HSDB specifications are two of the pave pillar avionics architecture bus specifications being developed for the F-22, LHX, and future military aircraft. While this model does not implement the entire HSDB protocol specification, it does implement enough of the referenced specifications to give credence to the concept of hardware simulation modeling of avionics specifications. This concept is applicable for both military and commercial applications written in the VHDL language at a specification level of detail. VHDL RTL model, Simulatable Specifications High Speed Data Bus (HSDB) Jiawg/Pave Pillar Avionics.
Descriptors : *COMPUTER NETWORKS, *COMPUTER COMMUNICATIONS, *BUS CONDUCTORS, *EXPERIMENTAL DESIGN, REPORTS, MILITARY AIRCRAFT, AVIONICS, CONTRACT ADMINISTRATION, SPECIFICATIONS, MODELS, MODULES(ELECTRONICS), SIMULATION, PROGRAMMING LANGUAGES, DATA PROCESSING.
Subject Categories : Computer Systems
Distribution Statement : APPROVED FOR PUBLIC RELEASE