Accession Number : ADA288254
Title : Using Machine Learning to Derive Efficient Cost and Performance Estimates in VLSI CAD Designs.
Descriptive Note : Doctoral thesis,
Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH
Personal Author(s) : Gelosh, Donald S.
PDF Url : ADA288254
Report Date : SEP 1994
Pagination or Media Count : 194
Abstract : Area and delay estimates facilitate effective decision-making ability in high level synthesis. Current estimation techniques focus on modeling the layout result and fail to deliver timely or accurate estimates. This thesis presents a novel approach to deriving these area and delay estimates by modeling the actions and activities of the layout tool, rather than the layout result. This approach uses machine learning techniques to analyze the input-to-output relationships that result from applying the target layout tool to an input design description and producing a layout as an output. This thesis describes a solution architecture using these machine learning techniques that captures the relationships between general design features and layout concepts. This solution architecture has the following characteristics. First, a set of several training designs captures the general design features. The target layout tool is run on the training designs and produces a set of actual layouts. The general design features and relative placement concepts from the actual layouts makes up a training set. The formulation of this training set is important to adequately describe the set of general design features and the associated layout concepts. Second, a machine learning system analyzes the training set looking for relationships between the design features and layout concepts. This analysis produces a model of the operation of the layout tool. Third, this model is applied to real designs to formulate area and delay estimates. This approach is found to produce accurate area and delay estimates very quickly, even for designs with several thousand gates.
Descriptors : *COMPUTER AIDED DESIGN, *LEARNING MACHINES, *VERY LARGE SCALE INTEGRATION, ALGORITHMS, NEURAL NETS, OPTIMIZATION, AUTOMATION, DECISION MAKING, DISTRIBUTED DATA PROCESSING, ACCURACY, COMPUTER ARCHITECTURE, COST ESTIMATES, EFFICIENCY, THESES, INPUT OUTPUT PROCESSING, GATES(CIRCUITS), RULE BASED SYSTEMS, CHIPS(ELECTRONICS), FABRICATION, PRODUCTION ENGINEERING, COMPUTER AID MANUFACTURING.
Subject Categories : Electrical and Electronic Equipment
Mfg & Industrial Eng & Control of Product Sys
Distribution Statement : APPROVED FOR PUBLIC RELEASE