Accession Number : ADA288532

Title :   An Architecture for Optimal All-to-All Personalized Communication.

Descriptive Note : Research rept.,

Corporate Author : CARNEGIE-MELLON UNIV PITTSBURGH PA DEPT OF COMPUTER SCIENCE

Personal Author(s) : Hinrichs, Susan ; Kosak, Corey ; O'Hallaron, David R. ; Stricker, Thomas M. ; Take, Riichiro

PDF Url : ADA288532

Report Date : SEP 1994

Pagination or Media Count : 33

Abstract : In all-to-all personalized communication (AAPC), every node of a parallel system sends a potentially unique packet to every other node. AAPC is an important primitive operation for modem parallel compilers, since it is used to redistribute data structures during parallel computations. As an extremely dense communication pattern, AAPC causes congestion in many types of networks and therefore executes very poorly on general purpose, asynchronous message passing routers. We present and evaluate a network architecture that executes all-to-all communication optimally on a two-dimensional torus. The router combines optimal partitions of the AAPC step with a self- synchronizing switching mechanism integrated into a conventional wormhole router. Optimality is achieved by routing along shortest paths while fully utilizing all links. A simple hardware addition for synchronized message switching can guarantee optimal AAPC routing in many existing network architectures. The flexible communication agent of the iWarp VLSI component allowed us to implement an efficient prototype for the evaluation of the hardware complexity as well as possible software overheads. The measured performance on an 8 x 8 torus exceeded 2 GigaBytes/sec or 80% of the limit set by the raw speed of the interconnects. We make a quantitative comparison of the AAPC router with a conventional message passing system. The potential gain of such a router for larger parallel programs is illustrated with the example of a two-dimensional Fast Fourier Transform.

Descriptors :   *COMPUTER COMMUNICATIONS, *COMPUTER ARCHITECTURE, *COMPUTER NETWORKS, *COMPILERS, *PARALLEL PROCESSINGORIENTATION, COMPUTER PROGRAMS, DATA BASES, COMPUTATIONS, ASYNCHRONOUS SYSTEMS, TOOLS, TWO DIMENSIONAL, COMPARISON, EFFICIENCY, PROTOTYPES, PROBLEM SOLVING, GAIN, HIGH DENSITY, PATTERNS, SYNCHRONIZATION(ELECTRONICS), COMMUNICATION AND RADIO SYSTEMS, FAST FOURIER TRANSFORMS, CONGESTION, SYNCHRONISM, MODEMS, MESSAGE PROCESSING, SWITCHING.

Subject Categories : Computer Programming and Software
      Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE