Accession Number : ADA288961
Title : Parallel Block Implicit Integration Technique for Trajectory Parallelism.
Corporate Author : NAVAL SURFACE WARFARE CENTER DAHLGREN DIV VA
Personal Author(s) : Rufty, Alan E.
PDF Url : ADA288961
Report Date : DEC 1994
Pagination or Media Count : 39
Abstract : This report describes the evaluation of a Parallel Block Implicit (PBI) integration technique in a simplified missile trajectory. This project was carried out to ascertain the suitability of PBI techniques when modest amounts of parallelism are available; that is, when 3 to 10 processors are allocated per missile trajectory. The PBI technique was first evaluated on a serial mainframe computer before it was implemented in parallel on an INMOS TRANSPUTER with four parallel central processing units. While the serial implementation of the four-node PBI technique indicated that a speedup of a factor of three to four was possible with ideal hardware, in practice only a modest gain (approximately 30 percent) was obtained because of systems-related overhead.
Descriptors : *GUIDED MISSILE TRAJECTORIES, *PARALLEL PROCESSING, ALGORITHMS, SOFTWARE ENGINEERING, ATMOSPHERE ENTRY, MICROPROCESSORS, COMPARISON, COMPUTER PROGRAMMING, CHIPS(ELECTRONICS), CONCURRENT ENGINEERING, NUMERICAL INTEGRATION, AERODYNAMIC FORCES, SUPERCOMPUTERS, SUBROUTINES, SIMPLIFICATION, RUNGE KUTTA METHOD, SERIAL PROCESSORS .
Subject Categories : Computer Programming and Software
Guided Missile Traj, Accuracy and Ballistics
Distribution Statement : APPROVED FOR PUBLIC RELEASE