Accession Number : ADA294622
Title : A CMOS, VLSI, Implementation of a FFT for Cyclic Spectral Analysis.
Descriptive Note : Masters's thesis,
Corporate Author : NAVAL POSTGRADUATE SCHOOL MONTEREY CA
Personal Author(s) : Jackson, Kevin L.
PDF Url : ADA294622
Report Date : MAR 1995
Pagination or Media Count : 336
Abstract : Cyclic Spectrum Analysis exploits the cyclostationary properties of signals and systems. Military use of this technology is focused on its use in a near real time analytical environment. Such a system requires high speed arithmetic processing in calculating large Fourier transforms quickly. This thesis reviews a previous implementation and then presents a new design using Verilog hardware description language and the Epoch silicon compiler. Using these modern computer aided design tools, the ASIC design was simulated and layout completed using a one micron, two-metal process rule set. The final layout consists of 434,138 transistors on a 11,190 x 15,642 micron die. Simulations indicated that the chip would be capable of operating at a 25 Mhz clock rate while dissipating .8 watts of power. Embedded timing analysis tools displayed all critical timing paths which allowed the identification of specific design improvements. If implemented, these changes could double the clock rate of the processor.
Descriptors : *VERY LARGE SCALE INTEGRATION, *FAST FOURIER TRANSFORMS, *SPECTRUM ANALYSIS, *COMPLEMENTARY METAL OXIDE SEMICONDUCTORS, COMPUTERIZED SIMULATION, HIGH RATE, COMPUTER AIDED DESIGN, CLOCKS, PROCESSING, RATES, THESES, CHIPS(ELECTRONICS), CYCLES, IDENTIFICATION, SIGNALS, SILICON, LANGUAGE, COMPUTER APPLICATIONS, COMPILERS, ARITHMETIC.
Subject Categories : Electrical and Electronic Equipment
Distribution Statement : APPROVED FOR PUBLIC RELEASE