Accession Number : ADA295536
Title : Fault-Sensitivity and Wear-Out Analysis of VLSI Systems.
Descriptive Note : Technical rept.,
Corporate Author : ILLINOIS UNIV AT URBANA COORDINATED SCIENCE LAB
Personal Author(s) : Choi, Gwan S.
PDF Url : ADA295536
Report Date : JUN 1995
Pagination or Media Count : 160
Abstract : This thesis describes simulation approaches to conduct fault sensitivity and wear-out failure analysis of VLSI systems. A fault-injection approach to study transient impact in VLSI systems is developed. Through simulated fault injection at the device level and subsequent fault propagation at the gate, functional and software levels, it is possible to identify critical bottlenecks in dependability. Techniques to speed up the fault simulation and to perform statistical analysis of fault impact are developed. A wear-out simulation environment is also developed to closely mimic dynamic sequences of wear-out events in a device through time, to localize weak location/aspect of target chip and to allow generation of Time-to-Failure (TTF) distribution of a VLSI chip as whole. First, an accurate simulation of a target chip and its application code is performed to acquire real workload trace data on switch activity. Then, using this switch activity information, wear-out of the each component of the chip is simulated using Monte Carlo techniques.
Descriptors : *VERY LARGE SCALE INTEGRATION, *WEAR, *COMPUTER AIDED DIAGNOSIS, *CIRCUIT ANALYSIS, VELOCITY, COMPUTER PROGRAMS, COMPUTERIZED SIMULATION, TRANSIENTS, PROPAGATION, INJECTION, POSITION(LOCATION), ENVIRONMENTS, IMPACT, DYNAMICS, ACCURACY, THESES, CHIPS(ELECTRONICS), TARGETS, SENSITIVITY, MONTE CARLO METHOD, SEQUENCES, CODING, STATISTICAL ANALYSIS, WORKLOAD, LOW STRENGTH, FAULT TOLERANCE, ERROR CORRECTION CODES, SWITCHES, FAULTS, FAILURE(ELECTRONICS), ERROR DETECTION CODES.
Subject Categories : Electrical and Electronic Equipment
Computer Programming and Software
Distribution Statement : APPROVED FOR PUBLIC RELEASE