Accession Number : ADA302359
Title : Architecture and Performance Analysis of DIRSMIN: A Fault-Tolerant Switch Using Dilated Reduced-Stage MIN.
Descriptive Note : Contract rept.,
Corporate Author : INSTITUTE FOR COMPUTER APPLICATIONS IN SCIENCE AND ENGINEERING HAMPTON VA
Personal Author(s) : Somani, Arun K. ; Zhang, Tianming
PDF Url : ADA302359
Report Date : NOV 1995
Pagination or Media Count : 30
Abstract : We develop and analyze a dilated high performance fault tolerant fast packet multistage interconnection network (MIN) in this paper. In this new design, the links at the input and the output stages of a dilated banyan based MIN are rearranged to create multiple routes for each source destination pair in the network after removing one stage in the network. These multiple paths are link and node disjoint. Fault tolerance at low latency is achieved by sending multiple copies of each input packet simultaneously using different routes and different priorities. This guarantees that high throughput is maintained even in the presence of faults. Throughput is analyzed using simulation and analysis and we show that the new design has considerably higher performance in the presence of a faulty switching element (SE) or link in comparison to dilated networks. We also analyze the reliability and show that the new design has superior reliability in comparison to competing proposals.
Descriptors : *FAULT TOLERANCE, *RELIABILITY(ELECTRONICS), *ELECTRONIC SWITCHES, OUTPUT, HIGH RATE, COMPUTER ARCHITECTURE, THROUGHPUT, ROUTING, COMPUTER NETWORKS, ELECTRONIC SWITCHING.
Subject Categories : Computer Hardware
Distribution Statement : APPROVED FOR PUBLIC RELEASE