Accession Number : ADA315082

Title :   A Hardware Analysis of the Fundamental Iterative Algorithm for Decoding A (17,9) Binary BCH Code.

Descriptive Note : Final rept.,

Corporate Author : ARMY ENGINEER WATERWAYS EXPERIMENT STATION VICKSBURG MS INFORMATION TECHNOLOG Y LAB

Personal Author(s) : Campbell, Roy L., Jr

PDF Url : ADA315082

Report Date : AUG 1996

Pagination or Media Count : 49

Abstract : The Berlekamp-Massey Algorithm (BMA) is commonly used in BCH decoding, but the Fundamental Iterative Algorithm (FIA) can, in many instances, correct more errors. The trade off lies in hardware complexity. The BMA has concise stages that do not require addressable memory, whereas the FIA struggles with memory management and complex stages. For the (17,9) BCH code over GF(256) with g(x)=m1(x), the FIA can correct up to two errors, but the BMA can correct only one error. Also, for a BER of 10(-5), the coding gains for the BMA and FIA are -.25dB and 1.4dB, respectively, which makes the FIA seem to be the better algorithm. The main drawback is the FIA is approximately 20 times more complex than the BMA. Also, the FIA does not have a critical path that is easily identified.

Descriptors :   *ALGORITHMS, *DECODING, MEMORY DEVICES, CODING, ERRORS, ITERATIONS, CRITICAL PATH METHODS.

Subject Categories : Computer Programming and Software
      Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE