Accession Number : ADA324613

Title :   Memory Management in the Tera MTA Computer System,

Corporate Author : TERA COMPUTER CO SEATTLE WA

Personal Author(s) : Korry, Richard ; McCann, Cathy ; Smith, Burton

PDF Url : ADA324613

Report Date : 1994

Pagination or Media Count : 13

Abstract : This paper describes memory scheduling for the Tera MTA (Multi Threaded Architecture) computer system. The Tera MTA is intended to support a mixture of large and small tasks running in parallel, and ensure that they all make progress commensurate with their importance. We describe the memory scheduling algorithms used to schedule these tasks fairly. Some of the issues encountered and solutions proposed are novel, due in part to the highly multiprogrammed nature of our architecture. In particular, we present an algorithm for swapping a set of tasks to and from memory that achieves minimal overhead, largely independent of the order in which tasks are swapped.

Descriptors :   *ALGORITHMS, *DATA MANAGEMENT, *COMPUTER ARCHITECTURE, *MULTIPROGRAMMING, COMPUTERS, PARALLEL PROCESSING, MEMORY DEVICES, SCHEDULING, WORKLOAD.

Subject Categories : Computer Programming and Software
      Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE