Accession Number : ADA325913

Title :   High-Performance Host Interfacing for Packet-Switched Networks,

Descriptive Note : Doctoral thesis,

Corporate Author : STANFORD UNIV CA DEPT OF COMPUTER SCIENCE

Personal Author(s) : Kanakia, Hemant R.

PDF Url : ADA325913

Report Date : JUL 1991

Pagination or Media Count : 64

Abstract : High performance computer communication between users requires significant improvements over conventional host-to-network interfaces. Conventional host-to-network interfaces impose excessive processing, system bus and interrupt overhead on a host. We discuss in this report three closely related questions that should be addressed in designing a high performance host interface. The first key question is should one have to change transport protocols. The second key question is how to divide transport protocol processing between a front-end, that we shall call network adapter, and the host processor. The third key question is what are the important trade-offs in the design of a network adapter. As a result of this investigation, proposed a Network Adapter Board (NAB) architecture. A prototype for NAB was built and the performance for the prototype shows an order of magnitude higher throughout for large data transfer and almost a third lower latency for mall amounts of data transfer. Based on this work, we conclude that state machines of current transport protocols do not have to change for high performance. The only desired change is the streamlining of transport protocols to facilitate techniques such as pipelined processing, predictive harder processing, and optimization of latency for small packets.

Descriptors :   *COMPUTER COMMUNICATIONS, *COMMUNICATIONS NETWORKS, *FRONT END PROCESSORS, INFORMATION TRANSFER, DATA TRANSMISSION SYSTEMS, PACKETS, PERFORMANCE(ENGINEERING), INTERFACES, THESES, PROCESSING EQUIPMENT, TRANSPORT, MACHINES, ADAPTERS.

Subject Categories : Computer Systems

Distribution Statement : APPROVED FOR PUBLIC RELEASE