Accession Number : ADA329455

Title :   12-Bit High Dynamic Range ADC.

Descriptive Note : Monthly rept. 15 Aug-15 Sep 97,

Corporate Author : TRW SPACE AND DEFENSE SECTOR REDONDO BEACH CA ELECTRONICS AND TECHNOLOGY DIV

Personal Author(s) : Oyama, Bert K.

PDF Url : ADA329455

Report Date : SEP 1997

Pagination or Media Count : 8

Abstract : During this reporting period, detailed preliminary analysis of the maximum ADC sample rate was completed. The results were discussed during a teleconference held on September 4, 1997 (attendees were: 0. Nichols, B. Oyama, S. Nelson, M. Englekirk, and B. Wong). Summaries of the analysis results are shown in Figures 1-1 and 1-2. The primary result of the analysis is a change in three design goals for the 12-bit ADC: (1) increased sample rate (213 Msps); (2) increased input frequency range (130 Mhz to 190 Mhz); (3) relaxed SNR/SFDR for near-full scale inputs (50 dB at Pclip). These changes are reflected in Figure 1-3. In addition, a preliminary chip specification (shown in Figure 1-4) was generated to communicate the detailed ADC requirements versus capabilities.

Descriptors :   *CHIPS(ELECTRONICS), *ANALOG TO DIGITAL CONVERTERS, INPUT, SPECIFICATIONS, VOLTAGE, CALIBRATION, CONFERENCING(COMMUNICATIONS).

Subject Categories : Electrical and Electronic Equipment
      Electricity and Magnetism

Distribution Statement : APPROVED FOR PUBLIC RELEASE