Accession Number : ADA336113
Title : A Reconfigurable Superscalar Architecture
Descriptive Note : Master's thesis
Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSONAFB OH SCHOOL OF ENGINEERING
Personal Author(s) : Mayer, Christopher B.
PDF Url : ADA336113
Report Date : DEC 1997
Pagination or Media Count : 293
Abstract : The invention of the Field Programmable Gate Array (FPGA) has led to a number of interesting developments. One is the idea of providing custom hardware support for applications running on a computer. These reconfigurable computers have been shown to decrease the execution time for some applications. Based on past results, attention has subsequently turned to using reconfigurable computing in general-purpose computers (e.g. desktop and workstation environments). This thesis develops a design for just such a computer. The design, FPGADLX, is based on a hypothetical superscalar computer running the DLX instruction set and is generic enough in principle to be adapted to any superscalar or VLIW processor on the market today. This thesis begins by examining FPGA technology and reviewing related reconfigurable computing efforts. Based on this review, requirements for a viable general-purpose reconfigurable computer system were developed. These requirements drove the development of the eventual FPGADLX design which covers hardware organization and operation, as well as modifications to the operating system and compiler. A software simulator which can emulate a significant portion of the design and run actual programs has been built.
Descriptors : *COMPUTER ARCHITECTURE, *SUPERCOMPUTERS, ALGORITHMS, COMPUTER AIDED DESIGN, THESES, GATES(CIRCUITS), OPERATING SYSTEMS(COMPUTERS), MULTIPROCESSORS, DESIGN CRITERIA, COMPILERS.
Subject Categories : Computer Hardware
Distribution Statement : APPROVED FOR PUBLIC RELEASE