Accession Number : ADB130734

Title :   VHSIC (Very High Speed Integrated Circuits) Phase 2 Interoperability Standards. Electrical Interface Specification. Version 2.4.

Corporate Author : IBM SYSTEMS INTEGRATION DIV MANASSAS VA

Report Date : 21 JAN 1988

Pagination or Media Count : 200

Abstract : This specification states the electrical interface and clock requirements for VHSIC (Very High Integrated Circuit) Phase 2 integrated circuits. The purpose of this specification is to establish an electrical interface and clock standard that facilitates interoperability of VHSIC Phase 2 integrated circuits. This specification applies to the following VHSIC Phase 2 electrical interfaces: Power supplies, DFNCLK and SYSCLK clock signals at the chip inputs. Any other SYSCLK synchronous clocks required by a VHSIC chip or chip set will be generated by that chip set from the DFNCLK and SYSCLK. The manufacturer of the chip or chip set may elect to provide additional JAN qualified clock generating chips in the set to provide additional clocks if the design requires them, but they must also require only the DFNCLK and SYSCLK clocking inputs. Electrical logic levels for point-to-point binary data interchange. (JES)

Descriptors :   *CHIPS(ELECTRONICS), *ELECTRICAL PROPERTIES, BINARY NOTATION, CLOCKS, DATA MANAGEMENT, INFORMATION EXCHANGE, INTEGRATED CIRCUITS, INTERFACES, LOGIC, POWER SUPPLIES, REQUIREMENTS, SIGNALS, SPECIFICATIONS.

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE