Accession Number : ADD000224
Title : Redundant Logic Circuit.
Descriptive Note : Patent,
Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC
Personal Author(s) : Miller, Frederic L
Report Date : 26 Mar 1974
Pagination or Media Count : 5
Abstract : This invention describes a redundant logic system having a plurality of input channels and a single output channel. The system initially senses and compares the absolute magnitude of two of the input channels. When the magnitudes are identical, a switch is initiated in one of these channels to connect it to the output channel. When one of the channels fails, the compared output of the absolute magnitude detectors is used to insure that the channel which has failed is disconnected and that the operating channel is connected to the output channel. Monitoring means are also provided to detect where failures have occurred.
Descriptors : *LOGIC CIRCUITS, *PATENTS, REDUNDANT COMPONENTS
Subject Categories : Computer Hardware
Distribution Statement : APPROVED FOR PUBLIC RELEASE