Accession Number : ADD000593
Title : Radiation-Hardened CMOS Devices and Circuits.
Descriptive Note : Patent,
Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON D C
Personal Author(s) : Hughes,Harold L
Report Date : 28 Jan 1975
Pagination or Media Count : 5
Abstract : The patent describes a technique of reducing the radiation sensitive nature of both P-channel and N-channel components of a CMOS structure. The channel oxide in both components is grown as pure as possible during the manufacture with a special attempt to keep the alkali content low. After the manufacturing process is complete, the P-channel component is masked while the entire N-channel component is subjected to an ion implantation which radiation hardens the entire CMOS device or circuit. This process provides a CMOS device which maintains a useable threshold level in the presence of and after it has been exposed to 1,000,000 and of radiation.
Descriptors : *Semiconductor devices, *Complementary metal oxide semiconductors, *Radiation hardening, *Patents, Integrated circuits, Ion implantation, Aluminum, Silicon dioxide
Subject Categories : Electrical and Electronic Equipment
Distribution Statement : APPROVED FOR PUBLIC RELEASE