Accession Number : ADD001492

Title :   High Speed Gated Video Integrator with Zero Offset.

Descriptive Note : Patent,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON D C

Personal Author(s) : Hughes,Richard Smith

Report Date : 01 Oct 1974

Pagination or Media Count : 4

Abstract : The patent describes a high speed gated video integrator having double differential amplifiers wherein equal currents bias 'on' one side of each differential amplifier. Then, to perform integration, the differential amplifiers are gated, and integration occurs only during such gated period. Low level pulses, independent of polarity and amplitude, can be integrated.

Descriptors :   *Integrators, *Patents, Video integration, Signal processing, Transistor amplifiers, Gates(Circuits)

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE