Accession Number : ADD005181

Title :   Discrete Transform Systems Using Permuter Memories.

Descriptive Note : Patent,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Whitehouse, Harper J ; Speiser, Jeffrey M

Report Date : 10 Jan 1978

Pagination or Media Count : 8

Abstract : This patent describes a high-speed, high-accuracy, apparatus for performing discrete Fourier and discrete cosine transforms, suitable for signal processing applications. The apparatus includes a means for switching an input signal from a sample-and-hold circuit to a circuit which includes an integrator in cascade with an amplifier. The outputs of these two circuits are summed in a first summer to give one term. G sub 0, which is proportional to the d-c component of the input signal. In parallel with the integrator and amplifier is a cascade circuit comprising a first permuter, a filter and a second permuter. A permuter is a special type of memory. The outputs of the sample-and-hold circuit and of the second permuter are summed in a second summer, to result in an output comprising the other transformed terms, G sub 1,..., G sub N-1. (Author)

Descriptors :   *PATENTS, *SWITCHING CIRCUITS, *DISCRETE FOURIER TRANSFORMS, *SIGNAL PROCESSING, CASCADE STRUCTURES, MEMORY DEVICES, PERMUTATIONS, OUTPUT

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE