Accession Number : ADD007027

Title :   Automatic Bias Adjustment Circuit for a Successive Ranged Analog/Digital Converter.

Descriptive Note : Patent,

Corporate Author : DEPARTMENT OF THE AIR FORCE WASHINGTON DC

Personal Author(s) : Morrison,Steven ; Lisle,Thomas K , Jr ; Glover,Clarence C

Report Date : 11 Mar 1980

Pagination or Media Count : 6

Abstract : This report describes an automatic bias adjustment circuit for a successive ranged analog/digital converter (SRADC) that eliminates the need for manual bias adjustments and calibration inputs. The bias correction circuit comprehends dual flip flops that are triggered by selected comparators of the SRADC n bit parallel analog/digital converter. The flip flop output signals control up/down counters whose output bits drive digital/analog converter. The digital/analog converted signals are introduced back into the SRADC analog chain to zero bias errors in a particular sub-range. A disabling circuit prevents operation of the bias adjustment circuits for the first sub-range. (Author)

Descriptors :   *Patents, *Analog to digital converters, Digital to analog converters, Bias

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE