Accession Number : ADD009272
Title : Fast Access Non-V0latile Memory.
Descriptive Note : Patent Application,
Corporate Author : DEPARTMENT OF THE AIR FORCE WASHINGTON DC
Personal Author(s) : Smith,P C
Report Date : 23 Nov 1981
Pagination or Media Count : 18
Abstract : Disclosed is a memory apparatus having a row and column decoder for controlling the read and the write function to a transistor memory pair. A single power/chip select pad is utilized to both power the memory and select the memory chip. External control signals are applied directly to critical internal node within the memory apparatus.
Descriptors : *Patent applications, *Memory devices, *Semiconductor devices, *Metal nitride oxide semiconductors, Transistors, Chips(Electronics), Decoders, Internal, External, Nodes, Signals, Power, Control
Subject Categories : Electrical and Electronic Equipment
Solid State Physics
Distribution Statement : APPROVED FOR PUBLIC RELEASE