Accession Number : ADD011687

Title :   Self-Aligned GaAs FET with Low 1/f Noise.

Descriptive Note : Patent Application,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Davey,J E

Report Date : 07 Mar 1985

Pagination or Media Count : 23

Abstract : A self-aligned GaAs FET is described with an active channel which is unaffected by surface charge trapping/emission. The device comprises a channel of n-doped GaAs, a source and drain regions of n(+) GaAs layer having open first and second end surfaces disposed at opposite ends of the channel, a semi-insulating GaAs layer disposed over the channel, with this GaAs having open first and second end surfaces disposed at an angle of greater than or equal to 45 deg relative to the channel plane. A cavity is disposed in the GaAs layer exposing a portion of the channel, and a gate metallization is disposed over the GaAs layer and extending form the first end surface to the second end surface of the GAAs layer and directly contacting the exposed portion of the channel region in the cavity to form a Schottky barrier contact. This gate metallization is not disposed in contact with a significant portion of either of the first and second end surfaces. The ends of the gate metallization overhang slightly the end surfaces of the GaAs layer in order to provide masking to maintain the first and second end surfaces open during fabrication. An insulator such as air may be disposed in contact with these end surfaces.

Descriptors :   *PATENT APPLICATIONS, *GATES(CIRCUITS), *GALLIUM ARSENIDES, *FIELD EFFECT TRANSISTORS, CHANNELS, SURFACES, GALLIUM ARSENIDE LASERS, MASKING, ALIGNMENT, DRAINAGE, REGIONS, METALLIZING, SELF OPERATION, ELECTRIC CHARGE, EMISSION, TRAPPING(CHARGED PARTICLES)

Subject Categories : Electrical and Electronic Equipment
      Cybernetics
      Solid State Physics

Distribution Statement : APPROVED FOR PUBLIC RELEASE