Accession Number : ADD011893

Title :   Variable Radix Processor.

Descriptive Note : Patent,

Corporate Author : DEPARTMENT OF THE AIR FORCE WASHINGTON DC

Personal Author(s) : Burrows,J L

Report Date : 09 Jul 1985

Pagination or Media Count : 13

Abstract : A variable radix processor is constructed on 1.25 micrometer CMOS/SOS. The processor, based upon a predetermined algorithm, is constructed to process radix 2 to 7 data wherein the data is input in a parallel-by-word, parallel-by-bit format. A format selection switch has the data input whereafter a plurality of switches outputs an address format to a bit-slice multiply-adder. The bit slice multiply-adder has ROMs addressed by the format selection switch. Based upon the predetermined algorithm, each unique address format causes the ROMs to output a unique word in parallel bits to a tally cascade circuit and then to a fast-carry adder. The processor can operate on a transfer function such as ZA = + or - (A + or - C), ZB = B wher A = sigma aiSi, B = biXi with very high throughput rates such as 380 million operations per second. (Author)

Descriptors :   *PATENTS, *COMPUTER LOGIC, *MULTIPLICATION, *ADDITION, *PROCESSING EQUIPMENT, *MEMORY DEVICES, *DATA PROCESSING, *IMAGE PROCESSING, *DIGITAL COMPUTERS, *COMPLEMENTARY METAL OXIDE SEMICONDUCTORS, *INTEGRATED CIRCUITS, *LOGIC CIRCUITS, TRANSFER FUNCTIONS, SHIFT REGISTERS, DATA RATE, HIGH RATE, FORMATS, ALGORITHMS, SWITCHES, THROUGHPUT, OUTPUT, CIRCUITS, RATES, SELECTION, ADDRESSING, INPUT

Subject Categories : Electrical and Electronic Equipment
      Theoretical Mathematics
      Computer Hardware
      Solid State Physics

Distribution Statement : APPROVED FOR PUBLIC RELEASE