Accession Number : ADD012531

Title :   Fast Envelope Detector with Bias Compensation.

Descriptive Note : Patent,

Corporate Author : DEPARTMENT OF THE AIR FORCE WASHINGTON DC

Personal Author(s) : Bryant,Steve M ; Cole,Lanier G

Report Date : 26 Aug 1986

Pagination or Media Count : 6

Abstract : In combination with an envelope detector in a radar system, a bias compensation circuit consisting of a programmable read-only memory and a binary adder produce an unbiased envelope detection signal. The bias compensation circuit adds one to the output of the detector based upon whether the minimum of the I and Q (inphase and quadrature) signals is odd and the maximum even. It is capable of compensating for both normal envelope detection and the multiple divide-by-two case. As a result the dynamic range of the radar can be increased without the necessity for extensive additional hardware.

Descriptors :   *PATENTS, *RADAR RECEIVERS, *SIGNAL PROCESSING, *DETECTORS, DYNAMIC RANGE, DETECTION, ORTHOGONALITY, READ ONLY MEMORIES, COMPENSATION, SIGNALS, CIRCUITS, BIAS, RADAR

Subject Categories : Active & Passive Radar Detection & Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE