Accession Number : ADD014198

Title :   Video Line Processor.

Descriptive Note : Patent, Filed 4 Apr 89, patented 18 Jun 86,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Hinman, Daryl E ; Anderson, Vernon A ; Bumgardner, Jon H

Report Date : 04 Apr 1989

Pagination or Media Count : 16

Abstract : A video line processor for varying the size of a video image portion along a video line in an image processor in which image size variation occurs first along horizontal lines and then along vertical lines and in which intermediate and final frames are stored in memories in which row and column addressing is interchanged on alternate frames. The line processor has a line memory for storing pixel values along each video line, has a pair of arithmetic circuits, one of which receives pixel values delayed in relation to pixel values received by the other, and has a coefficient memory with memory locations corresponding to pixel values along a video line, each of these locations being loaded between video frames with an address for the line memory and with coefficients for the arithmetic circuits to control, respectively, the position of each pixel value along a line and the transformation of the value. Patents. (rh)

Descriptors :   *ADDRESSING, *CIRCUITS, *CONTROL, *FRAMES, *IMAGE PROCESSING, *MEMORY DEVICES, *PATENTS, *PROCESSING EQUIPMENT, *TRANSFORMATIONS, *VIDEO FRAMES, *VIDEO SIGNALS, ARITHMETIC, COEFFICIENTS, IMAGES, POSITION(LOCATION), SIZES(DIMENSIONS), VARIATIONS

Subject Categories : Electrical and Electronic Equipment
      Test Facilities, Equipment and Methods

Distribution Statement : APPROVED FOR PUBLIC RELEASE