Accession Number : ADD014385

Title :   Dual Channel Gated Peak Detector.

Descriptive Note : Patent, Filed 30 Jul 82, patented 16 Oct 84,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Reed, Robert W

Report Date : 16 Oct 1984

Pagination or Media Count : 10

Abstract : A dual channel peak detector having an automatic gain control (AGC) circuit maintains an internal replica of a gated input signal waveform at a constant peak level. An rf signal is input to a double balanced mixer to select that portion of the signal within the time interval of interest. A delay and gate generator circuit provides a variable delay from a sync input and generates a variable length gate which gates on the double balance mixer to pass the signal of interest to the remainder of the peak detector circuit. The gated signal is amplified and multiplied by a pseudo dc signal from the AGC circuit. The peak level of the resultant gates signal is detected, The detected peak level is sampled and input to the AGC circuit which computes the AGC circuit output voltage required to maintain a constant detected peak level amplitude. The AGC circuit output voltage is summed with the voltage from a second channel, and is also output as a dB value and a ratio between channels. Keywords: Patents, PAT-CL-328-151. (KR)

Descriptors :   *AUTOMATIC GAIN CONTROL, *DETECTORS, *DUAL CHANNEL, *PATENTS, AMPLITUDE, CHANNELS, CIRCUITS, DELAY, GATES(CIRCUITS), GENERATORS, INPUT, INTERNAL, LENGTH, OUTPUT, PEAK POWER, PEAK VALUES, RADIOFREQUENCY, RATIOS, REPLICAS, SAMPLING, SIGNALS, TIME INTERVALS, VARIABLES, VOLTAGE, WAVEFORMS

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE