Accession Number : ADD015208

Title :   Process for Making Semiconductor-on-Insulator Device Interconnects.

Descriptive Note : Patent, Filed 13 Jul 89, patented 19 Nov 91,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Reedy, Ronald E ; Garcia, Graham A ; Lagnado, Isaac

Report Date : 19 Nov 1991

Pagination or Media Count : 9

Abstract : A process for developing conductive interconnect regions between integrated circuit semiconductor devices formed on an insulating substrate utilizes the semiconductor material itself for formation of device interconnect regions. A patterned layer of semiconductor material is formed directly on the surface of an insulating substrate. The patterned layer includes regions where semiconductor devices are to be formed and regions which are to be used to interconnect terminals of predetermined ones of the semiconductor devices. After forming the semiconductor material, the regions of the semiconductor material patterned for becoming interconnects are converted to a metallic compound of the semiconductor material. (Author)

Descriptors :   INSULATION, INTEGRATED CIRCUITS, LAYERS, MATERIALS, METALS, SEMICONDUCTOR DEVICES, SEMICONDUCTORS, SUBSTRATES

Subject Categories : Electrical and Electronic Equipment
      Solid State Physics

Distribution Statement : APPROVED FOR PUBLIC RELEASE