Accession Number : ADD015333

Title :   Circuitry for Compensating for Transistor Parameter Mismatches in a CMOS Analog Four-Quadrant Multiplier.

Descriptive Note : Patent, Filed 11 Apr 91, patented 17 Mar 92,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Shimabukuro, Randy L ; Shoemaker, Patrick A

Report Date : 17 Mar 1992

Pagination or Media Count : 13

Abstract : The present invention provides a circuit for eliminating quadratic and offset errors in the output of a CMOS four-quadrant analog multiplier. These errors are eliminated by feedback circuits that each include one or more CMOS four-quadrant analog multipliers.

Descriptors :   *CIRCUITS, *PATENTS, *ELECTRONIC MULTIPLIERS, ANALOGS, ERRORS, FEEDBACK, INVENTIONS, OUTPUT, QUADRANTS, NEURAL NETS, VOLTAGE

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE