Accession Number : ADD016191
Title : Zero-Time-Delay Video Processor Circuit.
Descriptive Note : Patent, Filed 1 Nov 91, patented 26 Oct 93,
Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC
Personal Author(s) : Bumgardner, Jon H
Report Date : 26 Oct 1993
Pagination or Media Count : 12
Abstract : A zero-time-delay video processor circuit includes reduction circuitry for receiving a digital image input and providing a reduced and Nyquist acceptable digital image output signal. A controlled write/read memory connected to the reduction circuitry provides the digital image output. A digital estimator is connected to the reduction circuitry for providing an estimated gain signal. A gain corrector circuit is connected to the controlled write/read memory for compensating for errors in the estimated gain. A signal indicative of the true or required gain is provided to the digital estimator and to the gain corrector.
Descriptors : *VIDEO CONVERTERS, *PATENTS, *DELAY CIRCUITS, CIRCUITS, DELAY, ERRORS, GAIN, IMAGES, INPUT, OUTPUT, SIGNALS, TIME, ANALOG TO DIGITAL CONVERTERS, DATA REDUCTION, IMAGE PROCESSING
Subject Categories : Electrical and Electronic Equipment
Distribution Statement : APPROVED FOR PUBLIC RELEASE